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cell: change spe_complement() to take a src and dst reg, like other instructions

tags/mesa_20090313
Brian Paul 17 years ago
parent
commit
0838b70275

+ 8
- 6
src/gallium/auxiliary/rtasm/rtasm_ppc_spe.c View File

@@ -623,9 +623,9 @@ spe_splat(struct spe_function *p, unsigned rT, unsigned rA)


void
spe_complement(struct spe_function *p, unsigned rT)
spe_complement(struct spe_function *p, unsigned rT, unsigned rA)
{
spe_nor(p, rT, rT, rT);
spe_nor(p, rT, rA, rA);
}


@@ -667,7 +667,8 @@ spe_splat_word(struct spe_function *p, unsigned rT, unsigned rA, int word)
}
}

/* For each 32-bit float element of rA and rB, choose the smaller of the
/**
* For each 32-bit float element of rA and rB, choose the smaller of the
* two, compositing them into the rT register.
*
* The Float Compare Greater Than (fcgt) instruction will put 1s into
@@ -683,7 +684,7 @@ spe_splat_word(struct spe_function *p, unsigned rT, unsigned rA, int word)
* like "x = min(x, a)", we always allocate a new register to be safe.
*/
void
spe_float_min(struct spe_function *p, unsigned int rT, unsigned int rA, unsigned int rB)
spe_float_min(struct spe_function *p, unsigned rT, unsigned rA, unsigned rB)
{
unsigned int compare_reg = spe_allocate_available_register(p);
spe_fcgt(p, compare_reg, rA, rB);
@@ -691,7 +692,8 @@ spe_float_min(struct spe_function *p, unsigned int rT, unsigned int rA, unsigned
spe_release_register(p, compare_reg);
}

/* For each 32-bit float element of rA and rB, choose the greater of the
/**
* For each 32-bit float element of rA and rB, choose the greater of the
* two, compositing them into the rT register.
*
* The logic is similar to that of spe_float_min() above; the only
@@ -699,7 +701,7 @@ spe_float_min(struct spe_function *p, unsigned int rT, unsigned int rA, unsigned
* so that the larger of the two is selected instead of the smaller.
*/
void
spe_float_max(struct spe_function *p, unsigned int rT, unsigned int rA, unsigned int rB)
spe_float_max(struct spe_function *p, unsigned rT, unsigned rA, unsigned rB)
{
unsigned int compare_reg = spe_allocate_available_register(p);
spe_fcgt(p, compare_reg, rA, rB);

+ 2
- 2
src/gallium/auxiliary/rtasm/rtasm_ppc_spe.h View File

@@ -310,9 +310,9 @@ spe_load_uint(struct spe_function *p, unsigned rT, unsigned int ui);
extern void
spe_splat(struct spe_function *p, unsigned rT, unsigned rA);

/** Complement/invert all bits in rT. */
/** rT = complement_all_bits(rA). */
extern void
spe_complement(struct spe_function *p, unsigned rT);
spe_complement(struct spe_function *p, unsigned rT, unsigned rA);

/** rT = rA. */
extern void

+ 2
- 2
src/gallium/drivers/cell/ppu/cell_gen_fp.c View File

@@ -924,7 +924,7 @@ emit_IF(struct codegen *gen, const struct tgsi_full_instruction *inst)
/* tmp = (s1_reg == 0) */
spe_ceqi(gen->f, tmp_reg, s1_reg, 0);
/* tmp = !tmp */
spe_complement(gen->f, tmp_reg);
spe_complement(gen->f, tmp_reg, tmp_reg);
/* exec_mask = exec_mask & tmp */
spe_and(gen->f, exec_reg, exec_reg, tmp_reg);

@@ -944,7 +944,7 @@ emit_ELSE(struct codegen *gen, const struct tgsi_full_instruction *inst)
spe_comment(gen->f, -4, "ELSE:");

/* exec_mask = !exec_mask */
spe_complement(gen->f, exec_reg);
spe_complement(gen->f, exec_reg, exec_reg);

return true;
}

+ 2
- 2
src/gallium/drivers/cell/ppu/cell_gen_fragment.c View File

@@ -920,7 +920,7 @@ gen_logicop(const struct pipe_blend_state *blend,
spe_andc(f, fragRGBA_reg, fbRGBA_reg, fragRGBA_reg);
break;
case PIPE_LOGICOP_COPY_INVERTED: /* ~s */
spe_complement(f, fragRGBA_reg);
spe_complement(f, fragRGBA_reg, fragRGBA_reg);
break;
case PIPE_LOGICOP_AND_REVERSE: /* s & ~d */
/* andc R, A, B computes R = A & ~B */
@@ -941,7 +941,7 @@ gen_logicop(const struct pipe_blend_state *blend,
break;
case PIPE_LOGICOP_EQUIV: /* ~(s ^ d) */
spe_xor(f, fragRGBA_reg, fragRGBA_reg, fbRGBA_reg);
spe_complement(f, fragRGBA_reg);
spe_complement(f, fragRGBA_reg, fragRGBA_reg);
break;
case PIPE_LOGICOP_NOOP: /* d */
spe_move(f, fragRGBA_reg, fbRGBA_reg);

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